ExtModule

firrtl.ir.ExtModule
case class ExtModule(info: Info, name: String, ports: Seq[Port], defname: String, params: Seq[Param], layers: Seq[String], requirements: Seq[String]) extends DefModule

External Module

Generally used for Verilog black boxes

Value parameters

defname

Defined name of the external module (ie. the name Firrtl will emit)

Attributes

Deprecated
[Since version Chisel 7.0.0] All APIs in package firrtl are deprecated.
Source
IR.scala
Graph
Supertypes
trait Serializable
trait Product
trait Equals
class DefModule
trait HasInfo
trait HasName
class FirrtlNode
class Object
trait Matchable
class Any
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Members list

Value members

Inherited methods

def productElementNames: Iterator[String]

Attributes

Inherited from:
Product
def productIterator: Iterator[Any]

Attributes

Inherited from:
Product
def serialize: String

Attributes

Inherited from:
UseSerializer (hidden)
Source
IR.scala