MemoryInitAnnotation
firrtl.annotations.MemoryInitAnnotation
sealed trait MemoryInitAnnotation extends SingleTargetAnnotation[ReferenceTarget]
Represents the initial value of the annotated memory. While not supported on normal ASIC flows, it can be useful for simulation and FPGA flows. This annotation is consumed by the verilog emitter.
Attributes
- Deprecated
-
[Since version Chisel 7.0.0]All APIs in package firrtl are deprecated. - Source
- MemoryInitAnnotation.scala
- Graph
-
- Supertypes
- Known subtypes
Members list
Value members
Abstract methods
Attributes
- Source
- MemoryInitAnnotation.scala
Inherited methods
Attributes
- Inherited from:
- Product
Attributes
- Inherited from:
- Product
Attributes
- Inherited from:
- Product
Attributes
- Inherited from:
- Product
Optional pretty print
Optional pretty print
Attributes
- Note
-
rarely used
- Inherited from:
- Annotation
- Source
- Annotation.scala
Update the target based on how signals are renamed
Update the target based on how signals are renamed
Attributes
- Inherited from:
- SingleTargetAnnotation
- Source
- Annotation.scala
Inherited and Abstract methods
Attributes
- Inherited from:
- Equals
Create another instance of this Annotation
Create another instance of this Annotation
Attributes
- Inherited from:
- SingleTargetAnnotation
- Source
- Annotation.scala
Attributes
- Inherited from:
- Product
Attributes
- Inherited from:
- Product
Inherited and Abstract fields
Attributes
- Inherited from:
- SingleTargetAnnotation
- Source
- Annotation.scala
In this article