EmitVcd

chisel3.simulator.scalatest.Cli.EmitVcd
trait EmitVcd

Adds -DemitVcd=[1,true]

This causes a simulation to dump a VCD wave starting at time zero. Finer grained control can be achieved with chisel3.simulator.ControlAPI.disableWaves and chisel3.simulator.ControlAPI.enableWaves.

Attributes

Source
Cli.scala
Graph
Supertypes
class Object
trait Matchable
class Any
Self type
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