chisel
7.9.0+2-5294dafe-SNAPSHOT
API
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chisel/chisel3/MemBase

MemBase

chisel3.MemBase
sealed abstract class MemBase[T <: Data](val t: T, val length: BigInt, val sourceInfo: SourceInfo)

Attributes

Source
Mem.scala
Graph
Supertypes
trait InstanceId
class Object
trait Matchable
class Any
Known subtypes
class Mem[T]
class SyncReadMem[T]

Members list

Value members

Concrete methods

protected def _applyImpl(idx: BigInt)(implicit sourceInfo: SourceInfo): T

Attributes

Source
Mem.scala
protected def _applyImpl(idx: Int)(implicit sourceInfo: SourceInfo): T

Attributes

Source
Mem.scala
protected def _applyImpl(idx: UInt)(implicit sourceInfo: SourceInfo): T

Attributes

Source
Mem.scala
protected def _applyImpl(idx: UInt, clock: Clock)(implicit sourceInfo: SourceInfo): T

Attributes

Source
Mem.scala
protected def _applyImpl(idx: UInt, clock: Clock, dir: MemPortDirection, warn: Boolean)(implicit sourceInfo: SourceInfo): T

Attributes

Source
Mem.scala
protected def _readImpl(idx: UInt)(implicit sourceInfo: SourceInfo): T

Attributes

Source
Mem.scala
protected def _readImpl(idx: UInt, clock: Clock)(implicit sourceInfo: SourceInfo): T

Attributes

Source
Mem.scala
protected def _writeImpl(idx: UInt, data: T)(implicit sourceInfo: SourceInfo): Unit

Attributes

Source
Mem.scala
protected def _writeImpl(idx: UInt, data: T, clock: Clock)(implicit sourceInfo: SourceInfo): Unit

Attributes

Source
Mem.scala
protected def _writeImpl(idx: UInt, data: T, mask: Seq[Bool])(implicit evidence: HasVecDataType[T], sourceInfo: SourceInfo): Unit

Attributes

Source
Mem.scala
protected def _writeImpl(idx: UInt, data: T, mask: Seq[Bool], clock: Clock)(implicit evidence: HasVecDataType[T], sourceInfo: SourceInfo): Unit

Attributes

Source
Mem.scala
protected def clockWarning(sourceInfo: Option[SourceInfo], dir: MemPortDirection): Unit

Attributes

Source
Mem.scala

Inherited methods

def apply(idx: UInt, clock: Clock)(using SourceInfo): T

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def apply(idx: UInt)(using SourceInfo): T

Creates a read/write accessor into the memory with dynamic addressing. See the class documentation of the memory for more detailed information.

Creates a read/write accessor into the memory with dynamic addressing. See the class documentation of the memory for more detailed information.

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def apply(idx: Int)(using SourceInfo): T

Creates a read accessor into the memory with static addressing. See the class documentation of the memory for more detailed information.

Creates a read accessor into the memory with static addressing. See the class documentation of the memory for more detailed information.

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def apply(idx: BigInt)(using SourceInfo): T

Creates a read accessor into the memory with static addressing. See the class documentation of the memory for more detailed information.

Creates a read accessor into the memory with static addressing. See the class documentation of the memory for more detailed information.

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
override def equals(that: Any): Boolean

Compares the receiver object (this) with the argument object (that) for equivalence.

Compares the receiver object (this) with the argument object (that) for equivalence.

Any implementation of this method should be an equivalence relation:

  • It is reflexive: for any instance x of type Any, x.equals(x) should return true.
  • It is symmetric: for any instances x and y of type Any, x.equals(y) should return true if and only if y.equals(x) returns true.
  • It is transitive: for any instances x, y, and z of type Any if x.equals(y) returns true and y.equals(z) returns true, then x.equals(z) should return true.

If you override this method, you should verify that your implementation remains an equivalence relation. Additionally, when overriding this method it is usually necessary to override hashCode to ensure that objects which are "equal" (o1.equals(o2) returns true) hash to the same scala.Int. (o1.hashCode.equals(o2.hashCode)).

Value parameters

that

the object to compare against this object for equality.

Attributes

Returns

true if the receiver object is equivalent to the argument; false otherwise.

Definition Classes
HasId -> Any
Inherited from:
HasId (hidden)
Source
Builder.scala
def hasSeed: Boolean

Attributes

Returns

Whether either autoName or suggestName has been called

Inherited from:
HasId (hidden)
Source
Builder.scala
override def hashCode: Int

Calculates a hash code value for the object.

Calculates a hash code value for the object.

The default hashing algorithm is platform dependent.

Note that it is allowed for two objects to have identical hash codes (o1.hashCode.equals(o2.hashCode)) yet not be equal (o1.equals(o2) returns false). A degenerate implementation could always return 0. However, it is required that if two objects are equal (o1.equals(o2) returns true) that they have identical hash codes (o1.hashCode.equals(o2.hashCode)). Therefore, when overriding this method, be sure to verify that the behavior is consistent with the equals method.

Attributes

Returns

the hash code value for this object.

Definition Classes
HasId -> Any
Inherited from:
HasId (hidden)
Source
Builder.scala
def instanceName: String

Attributes

Inherited from:
HasId (hidden)
Source
Builder.scala
def parentModName: String

Attributes

Inherited from:
HasId (hidden)
Source
Builder.scala
def parentPathName: String

Attributes

Inherited from:
HasId (hidden)
Source
Builder.scala
def pathName: String

Attributes

Inherited from:
HasId (hidden)
Source
Builder.scala
def read(idx: UInt, clock: Clock)(using SourceInfo): T

Creates a read accessor into the memory with dynamic addressing. Takes a clock parameter to bind a clock that may be different from the implicit clock. See the class documentation of the memory for more detailed information.

Creates a read accessor into the memory with dynamic addressing. Takes a clock parameter to bind a clock that may be different from the implicit clock. See the class documentation of the memory for more detailed information.

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def read(idx: UInt)(using SourceInfo): T

Creates a read accessor into the memory with dynamic addressing. See the class documentation of the memory for more detailed information.

Creates a read accessor into the memory with dynamic addressing. See the class documentation of the memory for more detailed information.

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def suggestName(seed: => String): HasId.this.type

Takes the first seed suggested. Multiple calls to this function will be ignored. If the final computed name conflicts with another name, it may get uniquified by appending a digit at the end.

Takes the first seed suggested. Multiple calls to this function will be ignored. If the final computed name conflicts with another name, it may get uniquified by appending a digit at the end.

Is a higher priority than autoSeed, in that regardless of whether autoSeed was called, suggestName will always take precedence.

Value parameters

seed

The seed for the name of this component

Attributes

Returns

this object

Inherited from:
HasId (hidden)
Source
Builder.scala
final def toAbsoluteTarget: ReferenceTarget

Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph

Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph

Attributes

Inherited from:
NamedComponent (hidden)
Source
Builder.scala
final def toNamed: ComponentName

Returns a FIRRTL ComponentName that references this object

Returns a FIRRTL ComponentName that references this object

Attributes

Note

Should not be called until circuit elaboration is complete

Inherited from:
NamedComponent (hidden)
Source
Builder.scala
final def toRelativeTarget(root: Option[BaseModule]): ReferenceTarget

Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.

Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.

If root is defined, the target is a hierarchical path starting from root.

If root is not defined, the target is a hierarchical path equivalent to toAbsoluteTarget.

Attributes

Note

If root is defined, and has not finished elaboration, this must be called within atModuleBodyEnd.

The NamedComponent must be a descendant of root, if it is defined.

This doesn't have special handling for Views.

Inherited from:
NamedComponent (hidden)
Source
Builder.scala
final def toRelativeTargetToHierarchy(root: Option[Hierarchy[BaseModule]]): ReferenceTarget

Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.

Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.

If root is defined, the target is a hierarchical path starting from root.

If root is not defined, the target is a hierarchical path equivalent to toAbsoluteTarget.

Attributes

Note

If root is defined, and has not finished elaboration, this must be called within atModuleBodyEnd.

The NamedComponent must be a descendant of root, if it is defined.

This doesn't have special handling for Views.

Inherited from:
NamedComponent (hidden)
Source
Builder.scala
final def toTarget: ReferenceTarget

Returns a FIRRTL ReferenceTarget that references this object

Returns a FIRRTL ReferenceTarget that references this object

Attributes

Note

Should not be called until circuit elaboration is complete

Inherited from:
NamedComponent (hidden)
Source
Builder.scala
def write(idx: UInt, data: T, mask: Seq[Bool], clock: Clock)(using HasVecDataType[T], SourceInfo): Unit

Creates a masked write accessor into the memory with a clock that may be different from the implicit clock.

Creates a masked write accessor into the memory with a clock that may be different from the implicit clock.

Value parameters

clock

clock to bind to this accessor

data

new data to write

idx

memory element index to write into

mask

write mask as a Seq of Bool: a write to the Vec element in memory is only performed if the corresponding mask index is true.

Attributes

Note

this is only allowed if the memory's element data type is a Vec

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def write(idx: UInt, data: T, mask: Seq[Bool])(using HasVecDataType[T], SourceInfo): Unit

Creates a masked write accessor into the memory.

Creates a masked write accessor into the memory.

Value parameters

data

new data to write

idx

memory element index to write into

mask

write mask as a Seq of Bool: a write to the Vec element in memory is only performed if the corresponding mask index is true.

Attributes

Note

this is only allowed if the memory's element data type is a Vec

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def write(idx: UInt, data: T, clock: Clock)(using SourceInfo): Unit

Creates a write accessor into the memory with a clock that may be different from the implicit clock.

Creates a write accessor into the memory with a clock that may be different from the implicit clock.

Value parameters

clock

clock to bind to this accessor

data

new data to write

idx

memory element index to write into

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala
def write(idx: UInt, data: T)(using SourceInfo): Unit

Creates a write accessor into the memory.

Creates a write accessor into the memory.

Value parameters

data

new data to write

idx

memory element index to write into

Attributes

Inherited from:
MemBaseIntf (hidden)
Source
MemIntf.scala

Concrete fields

val length: BigInt

Attributes

Source
Mem.scala
protected val sourceInfo: SourceInfo

Attributes

Source
Mem.scala
val t: T

Attributes

Source
Mem.scala
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