object dontTouch
Marks that a signal's leaves are an optimization barrier to Chisel and the FIRRTL compiler. This has the effect of guaranteeing that a signal will not be removed.
- Source
- dontTouch.scala
class MyModule extends Module { val io = IO(new Bundle { val a = Input(UInt(32.W)) val b = Output(UInt(32.W)) }) io.b := io.a val dead = io.a +% 1.U // normally dead would be pruned by DCE dontTouch(dead) // Marking it as such will preserve it }
- Note
Because this is an optimization barrier, constants will not be propagated through a signal's leaves marked as dontTouch.
Example:
Linear Supertypes
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Mark a signal's leaves as an optimization barrier to Chisel and FIRRTL.
Mark a signal's leaves as an optimization barrier to Chisel and FIRRTL.
- data
The signal to be marked
- returns
Unmodified signal
data
- Note
Requires the argument to be bound to hardware
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This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt,SInt,Bool,Clock, andReg, the abstract typesBits,Aggregate, andData, and the aggregate typesBundleandVec.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
utilpackage.The
testerspackage defines the basic interface for chisel testers.