case object DontCare extends Element with ConnectableDocs with Product with Serializable
RHS (source) for Invalidate API. Causes connection logic to emit a DefInvalid when connected to an output port (or wire).
- Source
- Data.scala
- Grouped
- Alphabetic
- By Inheritance
- DontCare
- Serializable
- Product
- Equals
- ConnectableDocs
- Element
- Data
- DataIntf
- SourceInfoDoc
- NamedComponent
- HasId
- InstanceId
- AnyRef
- Any
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- Public
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Value Members
- final def !=(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- final def ##: Int
- Definition Classes
- AnyRef → Any
- final def :=(that: => Data)(implicit sourceInfo: SourceInfo): Unit
The "strong connect" operator.
The "strong connect" operator.
For chisel3._, this operator is mono-directioned; all sub-elements of
thiswill be driven by sub-elements ofthat.- Equivalent to
this :#= that
For Chisel._, this operator connections bi-directionally via emitting the FIRRTL.<=
- Equivalent to
this :<>= that
- that
the Data to connect from
- Definition Classes
- Data
- Equivalent to
- final def :>=[T <: Data](producer: => T)(implicit sourceInfo: SourceInfo): Unit
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
For
consumer :>= producer, each ofproducer's leaf members which are flipped with respect toproducerare driven from the corresponding consumer leaf member Onlyproducer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectreadyfrom consumer to producer, but leavebitsandvalidunconnected
- producer
the right-hand-side of the connection; will always be driven by leaf connections, and never drive leaf connections ("flipped connection")
- final def <>(that: => Data)(implicit sourceInfo: SourceInfo): Unit
The "bulk connect operator", assigning elements in this Vec from elements in a Vec.
The "bulk connect operator", assigning elements in this Vec from elements in a Vec.
For chisel3._, uses the
chisel3.internal.BiConnectalgorithm; sub-elements of thatmay end up driving sub-elements ofthis- Complicated semantics, hard to write quickly, will likely be deprecated in the future
For Chisel._, emits the FIRRTL.<- operator
- Equivalent to
this :<>= thatwithout the restrictions that bundle field names and vector sizes must match
- that
the Data to connect from
- Definition Classes
- Data
- final def ==(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- def _asUIntImpl(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Data
- def _fromUInt(that: UInt)(implicit sourceInfo: SourceInfo): Data
Return a value of this type from a UInt type.
- final def asInstanceOf[T0]: T0
- Definition Classes
- Any
- macro def asTypeOf[T <: Data](that: T): T
Does a reinterpret cast of the bits in this node into the format that provides.
Does a reinterpret cast of the bits in this node into the format that provides. Returns a new Wire of that type. Does not modify existing nodes.
x.asTypeOf(that) performs the inverse operation of x := that.toBits.
- Definition Classes
- DataIntf
- Note
bit widths are NOT checked, may pad or drop bits from input
,that should have known widths
- final macro def asUInt: UInt
Reinterpret cast to UInt.
Reinterpret cast to UInt.
- Definition Classes
- DataIntf
- Note
value not guaranteed to be preserved: for example, a SInt of width 3 and value -1 (0b111) would become an UInt with value 7
,Aggregates are recursively packed with the first element appearing in the least-significant bits of the result.
- def autoSeed(name: String): DontCare.this.type
Takes the last seed suggested.
Takes the last seed suggested. Multiple calls to this function will take the last given seed, unless this HasId is a module port (see overridden method in Data.scala).
If the final computed name conflicts with the final name of another signal, the final name may get uniquified by appending a digit at the end of the name.
Is a lower priority than suggestName, in that regardless of whether autoSeed was called, suggestName will always take precedence if it was called.
- returns
this object
- Definition Classes
- Data → HasId
- def binding: Option[Binding]
- def binding_=(target: Binding): Unit
- Attributes
- protected
- Definition Classes
- Data
- def clone(): AnyRef
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.CloneNotSupportedException]) @native()
- def cloneType: DontCare.this.type
Internal API; Chisel users should look at chisel3.chiselTypeOf(...).
- def containsAFlipped: Boolean
- def do_asTypeOf[T <: Data](that: T)(implicit sourceInfo: SourceInfo): T
- Definition Classes
- DataIntf
- def do_asUInt(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- DataIntf
- final def eq(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def equals(that: Any): Boolean
- Definition Classes
- HasId → AnyRef → Any
- def finalize(): Unit
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.Throwable])
- final def getClass(): Class[_ <: AnyRef]
- Definition Classes
- AnyRef → Any
- Annotations
- @native()
- final def getWidth: Int
Returns the width, in bits, if currently known.
Returns the width, in bits, if currently known.
- Definition Classes
- Data
- def hasSeed: Boolean
- returns
Whether either autoName or suggestName has been called
- Definition Classes
- HasId
- def hashCode(): Int
- Definition Classes
- HasId → AnyRef → Any
- def instanceName: String
- Definition Classes
- HasId → InstanceId
- final def isInstanceOf[T0]: Boolean
- Definition Classes
- Any
- def isLit: Boolean
- Definition Classes
- Data
- final def isWidthKnown: Boolean
Returns whether the width is currently known.
Returns whether the width is currently known.
- Definition Classes
- Data
- def litOption: Option[BigInt]
If this is a literal that is representable as bits, returns the value as a BigInt.
- def litValue: BigInt
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
- Definition Classes
- Data
- def name: String
- Definition Classes
- Element
- final def ne(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- final def notify(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native()
- final def notifyAll(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native()
- def parentModName: String
- Definition Classes
- HasId → InstanceId
- def parentPathName: String
- Definition Classes
- HasId → InstanceId
- def pathName: String
- Definition Classes
- HasId → InstanceId
- def productElementName(n: Int): String
- Definition Classes
- Product
- def productElementNames: Iterator[String]
- Definition Classes
- Product
- def suggestName(seed: => String): DontCare.this.type
Takes the first seed suggested.
Takes the first seed suggested. Multiple calls to this function will be ignored. If the final computed name conflicts with another name, it may get uniquified by appending a digit at the end.
Is a higher priority than
autoSeed, in that regardless of whetherautoSeedwas called, suggestName will always take precedence.- seed
The seed for the name of this component
- returns
this object
- Definition Classes
- HasId
- final def synchronized[T0](arg0: => T0): T0
- Definition Classes
- AnyRef
- final def toAbsoluteTarget: ReferenceTarget
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
- Definition Classes
- NamedComponent → InstanceId
- final def toNamed: ComponentName
Returns a FIRRTL ComponentName that references this object
Returns a FIRRTL ComponentName that references this object
- Definition Classes
- NamedComponent → InstanceId
- Note
Should not be called until circuit elaboration is complete
- def toPrintable: Printable
Default pretty printing
- final def toRelativeTarget(root: Option[BaseModule]): ReferenceTarget
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
If
rootis defined, the target is a hierarchical path starting fromroot.If
rootis not defined, the target is a hierarchical path equivalent totoAbsoluteTarget.- Definition Classes
- NamedComponent
- Note
If
,rootis defined, and has not finished elaboration, this must be called withinatModuleBodyEnd.The NamedComponent must be a descendant of
,root, if it is defined.This doesn't have special handling for Views.
- final def toRelativeTargetToHierarchy(root: Option[Hierarchy[BaseModule]]): ReferenceTarget
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
If
rootis defined, the target is a hierarchical path starting fromroot.If
rootis not defined, the target is a hierarchical path equivalent totoAbsoluteTarget.- Definition Classes
- NamedComponent
- Note
If
,rootis defined, and has not finished elaboration, this must be called withinatModuleBodyEnd.The NamedComponent must be a descendant of
,root, if it is defined.This doesn't have special handling for Views.
- def toString(): String
- Definition Classes
- DontCare → AnyRef → Any
- final def toTarget: ReferenceTarget
Returns a FIRRTL ReferenceTarget that references this object
Returns a FIRRTL ReferenceTarget that references this object
- Definition Classes
- NamedComponent → InstanceId
- Note
Should not be called until circuit elaboration is complete
- def typeName: String
A non-ambiguous name of this
Datafor use in generated Verilog namesA non-ambiguous name of this
Datafor use in generated Verilog names- Definition Classes
- Data
- final def wait(): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long, arg1: Int): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException]) @native()
- def widthKnown: Boolean
- Definition Classes
- Element
- final def widthOption: Option[Int]
Returns Some(width) if the width is known, else None.
Returns Some(width) if the width is known, else None.
- Definition Classes
- Data
Inherited from Serializable
Inherited from Product
Inherited from Equals
Inherited from ConnectableDocs
Inherited from Element
Inherited from Data
Inherited from DataIntf
Inherited from SourceInfoDoc
Inherited from NamedComponent
Inherited from HasId
Inherited from InstanceId
Inherited from AnyRef
Inherited from Any
connection
Ungrouped
SourceInfoTransformMacro
These internal methods are not part of the public-facing API!
The equivalent public-facing methods do not have the do_ prefix or have the same name. Use and look at the
documentation for those. If you want left shift, use <<, not do_<<. If you want conversion to a
Seq of Bools look at the asBools above, not the one below. Users can safely ignore
every method in this group!
🐉🐉🐉 Here be dragons... 🐉🐉🐉
These do_X methods are used to enable both implicit passing of SourceInfo
while also supporting chained apply methods. In effect all "normal" methods that you, as a user, will use in your
designs, are converted to their "hidden", do_*, via macro transformations. Without using macros here, only one
of the above wanted behaviors is allowed (implicit passing and chained applies)---the compiler interprets a
chained apply as an explicit 'implicit' argument and will throw type errors.
The "normal", public-facing methods then take no SourceInfo. However, a macro transforms this public-facing method
into a call to an internal, hidden do_* that takes an explicit SourceInfo by inserting an
implicitly[SourceInfo] as the explicit argument.
This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt,SInt,Bool,Clock, andReg, the abstract typesBits,Aggregate, andData, and the aggregate typesBundleandVec.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
utilpackage.The
testerspackage defines the basic interface for chisel testers.