sealed class UInt extends Bits with UIntIntf with Num[UInt]
A data type for unsigned integers, represented as a binary bitvector. Defines arithmetic operations between other integer types.
- Source
- Bits.scala
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Value Members
- final def !=(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- final macro def ##(that: Bits): UInt
Concatenation operator
- final def ##: Int
- Definition Classes
- AnyRef → Any
- final macro def %(that: UInt): UInt
Modulo operator
- final macro def &(that: UInt): UInt
Bitwise and operator
- final macro def *(that: UInt): UInt
Multiplication operator
- final macro def *(that: SInt): SInt
Multiplication operator
- final macro def +(that: UInt): UInt
Addition operator
- final macro def +%(that: UInt): UInt
Addition operator (constant width)
- final macro def +&(that: UInt): UInt
Addition operator (expanding width)
- final macro def -(that: UInt): UInt
Subtraction operator
- final macro def -%(that: UInt): UInt
Subtraction operator (constant width)
- final macro def -&(that: UInt): UInt
Subtraction operator (increasing width)
- def ->[B](y: B): (UInt, B)
- final macro def /(that: UInt): UInt
Division operator
- final def :#=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "mono-direction connection operator", aka the "coercion operator".
The "mono-direction connection operator", aka the "coercion operator".
For
consumer :#= producer, all leaf members of consumer (regardless of relative flip) are driven by the corresponding leaf members of producer (regardless of relative flip)Identical to calling :<= and :>=, but swapping consumer/producer for :>= (order is irrelevant), e.g.: consumer :<= producer producer :>= consumer
Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '#' means to ignore flips, always drive from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes: - Connecting two
util.DecoupledIO's would connectbits,valid, ANDreadyfrom producer to consumer (despitereadybeing flipped) - Functionally equivalent to chisel3.:=, but different than Chisel.:=- producer
the right-hand-side of the connection, all members will be driving, none will be driven-to
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :#=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "mono-direction connection operator", aka the "coercion operator".
The "mono-direction connection operator", aka the "coercion operator".
For
consumer :#= producer, all leaf members of consumer (regardless of relative flip) are driven by the corresponding leaf members of producer (regardless of relative flip)Identical to calling :<= and :>=, but swapping consumer/producer for :>= (order is irrelevant), e.g.: consumer :<= producer producer :>= consumer
Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '#' means to ignore flips, always drive from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes: - Connecting two
util.DecoupledIO's would connectbits,valid, ANDreadyfrom producer to consumer (despitereadybeing flipped) - Functionally equivalent to chisel3.:=, but different than Chisel.:=- producer
the right-hand-side of the connection, all members will be driving, none will be driven-to
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :#=[S <: Data](lProducer: => S)(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "mono-direction connection operator", aka the "coercion operator".
The "mono-direction connection operator", aka the "coercion operator".
For
consumer :#= producer, all leaf members of consumer (regardless of relative flip) are driven by the corresponding leaf members of producer (regardless of relative flip)Identical to calling :<= and :>=, but swapping consumer/producer for :>= (order is irrelevant), e.g.: consumer :<= producer producer :>= consumer
Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '#' means to ignore flips, always drive from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes: - Connecting two
util.DecoupledIO's would connectbits,valid, ANDreadyfrom producer to consumer (despitereadybeing flipped) - Functionally equivalent to chisel3.:=, but different than Chisel.:=- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "aligned connection operator" between a producer and consumer.
The "aligned connection operator" between a producer and consumer.
For
consumer :<= producer, each ofconsumer's leaf members which are aligned with respect toconsumerare driven from the correspondingproducerleaf member. Onlyconsumer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectbitsandvalidfrom producer to consumer, but leavereadyunconnected
- producer
the right-hand-side of the connection; will always drive leaf connections, and never get driven by leaf connections ("aligned connection")
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "aligned connection operator" between a producer and consumer.
The "aligned connection operator" between a producer and consumer.
For
consumer :<= producer, each ofconsumer's leaf members which are aligned with respect toconsumerare driven from the correspondingproducerleaf member. Onlyconsumer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectbitsandvalidfrom producer to consumer, but leavereadyunconnected
- producer
the right-hand-side of the connection; will always drive leaf connections, and never get driven by leaf connections ("aligned connection")
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<=[S <: Data](lProducer: => S)(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "aligned connection operator" between a producer and consumer.
The "aligned connection operator" between a producer and consumer.
For
consumer :<= producer, each ofconsumer's leaf members which are aligned with respect toconsumerare driven from the correspondingproducerleaf member. Onlyconsumer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectbitsandvalidfrom producer to consumer, but leavereadyunconnected
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<>=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "bi-direction connection operator", aka the "tur-duck-en operator"
The "bi-direction connection operator", aka the "tur-duck-en operator"
For
consumer :<>= producer, both producer and consumer leafs could be driving or be driven-to. Theconsumer's members aligned w.r.t.consumerwill be driven by corresponding members ofproducer; theproducer's members flipped w.r.t.producerwill be driven by corresponding members ofconsumerIdentical to calling
:<=and:>=in sequence (order is irrelevant), e.g.consumer :<= producerthenconsumer :>= producerSymbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
- An additional type restriction is that all relative orientations of
consumerandproducermust match exactly.
Additional notes:
- Connecting two wires of
util.DecoupledIOchisel type would connectbitsandvalidfrom producer to consumer, andreadyfrom consumer to producer. - If the types of consumer and producer also have identical relative flips, then we can emit FIRRTL.<= as it is a stricter version of chisel3.:<>=
- "turk-duck-en" is a dish where a turkey is stuffed with a duck, which is stuffed with a chicken;
:<>=is a:=stuffed with a<>
- producer
the right-hand-side of the connection
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<>=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "bi-direction connection operator", aka the "tur-duck-en operator"
The "bi-direction connection operator", aka the "tur-duck-en operator"
For
consumer :<>= producer, both producer and consumer leafs could be driving or be driven-to. Theconsumer's members aligned w.r.t.consumerwill be driven by corresponding members ofproducer; theproducer's members flipped w.r.t.producerwill be driven by corresponding members ofconsumerIdentical to calling
:<=and:>=in sequence (order is irrelevant), e.g.consumer :<= producerthenconsumer :>= producerSymbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
- An additional type restriction is that all relative orientations of
consumerandproducermust match exactly.
Additional notes:
- Connecting two wires of
util.DecoupledIOchisel type would connectbitsandvalidfrom producer to consumer, andreadyfrom consumer to producer. - If the types of consumer and producer also have identical relative flips, then we can emit FIRRTL.<= as it is a stricter version of chisel3.:<>=
- "turk-duck-en" is a dish where a turkey is stuffed with a duck, which is stuffed with a chicken;
:<>=is a:=stuffed with a<>
- producer
the right-hand-side of the connection
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<>=[S <: Data](lProducer: => S)(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "bi-direction connection operator", aka the "tur-duck-en operator"
The "bi-direction connection operator", aka the "tur-duck-en operator"
For
consumer :<>= producer, both producer and consumer leafs could be driving or be driven-to. Theconsumer's members aligned w.r.t.consumerwill be driven by corresponding members ofproducer; theproducer's members flipped w.r.t.producerwill be driven by corresponding members ofconsumerIdentical to calling
:<=and:>=in sequence (order is irrelevant), e.g.consumer :<= producerthenconsumer :>= producerSymbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
- An additional type restriction is that all relative orientations of
consumerandproducermust match exactly.
Additional notes:
- Connecting two wires of
util.DecoupledIOchisel type would connectbitsandvalidfrom producer to consumer, andreadyfrom consumer to producer. - If the types of consumer and producer also have identical relative flips, then we can emit FIRRTL.<= as it is a stricter version of chisel3.:<>=
- "turk-duck-en" is a dish where a turkey is stuffed with a duck, which is stuffed with a chicken;
:<>=is a:=stuffed with a<>
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :=(that: => Data)(implicit sourceInfo: SourceInfo): Unit
The "strong connect" operator.
The "strong connect" operator.
For chisel3._, this operator is mono-directioned; all sub-elements of
thiswill be driven by sub-elements ofthat.- Equivalent to
this :#= that
For Chisel._, this operator connections bi-directionally via emitting the FIRRTL.<=
- Equivalent to
this :<>= that
- that
the Data to connect from
- Definition Classes
- Data
- Equivalent to
- final def :>=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
For
consumer :>= producer, each ofproducer's leaf members which are flipped with respect toproducerare driven from the corresponding consumer leaf member Onlyproducer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectreadyfrom consumer to producer, but leavebitsandvalidunconnected
- producer
the right-hand-side of the connection; will always be driven by leaf connections, and never drive leaf connections ("flipped connection")
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :>=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
For
consumer :>= producer, each ofproducer's leaf members which are flipped with respect toproducerare driven from the corresponding consumer leaf member Onlyproducer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectreadyfrom consumer to producer, but leavebitsandvalidunconnected
- producer
the right-hand-side of the connection; will always be driven by leaf connections, and never drive leaf connections ("flipped connection")
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :>=[S <: Data](lProducer: => S)(implicit evidence: =:=[UInt, S], sourceInfo: SourceInfo): Unit
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
For
consumer :>= producer, each ofproducer's leaf members which are flipped with respect toproducerare driven from the corresponding consumer leaf member Onlyproducer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectreadyfrom consumer to producer, but leavebitsandvalidunconnected
- Implicit
- This member is added by an implicit conversion from UInt toConnectableDefault[UInt] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final macro def <(that: UInt): Bool
Less than operator
- final macro def <<(that: UInt): Bits
Dynamic left shift operator
- final macro def <<(that: Int): Bits
Static left shift operator
Static left shift operator
- that
an amount to shift by
- returns
this UInt with
thatmany zeros concatenated to its least significant end $sumWidthInt
- Definition Classes
- BitsIntf
- final macro def <<(that: BigInt): Bits
Static left shift operator
Static left shift operator
- that
an amount to shift by
- returns
this UInt with
thatmany zeros concatenated to its least significant end $sumWidthInt
- Definition Classes
- BitsIntf
- final macro def <=(that: UInt): Bool
Less than or equal to operator
- final def <>(that: => Data)(implicit sourceInfo: SourceInfo): Unit
The "bulk connect operator", assigning elements in this Vec from elements in a Vec.
The "bulk connect operator", assigning elements in this Vec from elements in a Vec.
For chisel3._, uses the
chisel3.internal.BiConnectalgorithm; sub-elements of thatmay end up driving sub-elements ofthis- Complicated semantics, hard to write quickly, will likely be deprecated in the future
For Chisel._, emits the FIRRTL.<- operator
- Equivalent to
this :<>= thatwithout the restrictions that bundle field names and vector sizes must match
- that
the Data to connect from
- Definition Classes
- Data
- final macro def =/=(that: UInt): Bool
Dynamic not equals operator
- final def ==(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- final macro def ===(that: UInt): Bool
Dynamic equals operator
- final macro def >(that: UInt): Bool
Greater than operator
- final macro def >=(that: UInt): Bool
Greater than or equal to operator
- final macro def >>(that: UInt): Bits
Dynamic right shift operator
- final macro def >>(that: Int): Bits
Static right shift operator
- final macro def >>(that: BigInt): Bits
Static right shift operator
- final macro def ^(that: UInt): UInt
Bitwise exclusive or (xor) operator
- def _absImpl(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _andRImpl(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _applyImpl(x: BigInt, y: BigInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Bits
- def _applyImpl(x: Int, y: Int)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Bits
- def _applyImpl(x: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- Definition Classes
- Bits
- def _applyImpl(x: Int)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- Definition Classes
- Bits
- def _applyImpl(x: BigInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- Definition Classes
- Bits
- def _asBoolImpl(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- Definition Classes
- Bits
- def _asBoolsImpl(implicit sourceInfo: SourceInfo): Seq[Bool]
- Attributes
- protected
- Definition Classes
- Bits
- def _asSIntImpl(implicit sourceInfo: SourceInfo): SInt
- def _asUIntImpl(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Data
- def _bitSetImpl(off: UInt, dat: Bool)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _extractImpl(x: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- Definition Classes
- Bits
- def _extractImpl(x: BigInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- Definition Classes
- Bits
- def _fromUInt(that: UInt)(implicit sourceInfo: SourceInfo): UInt.this.type
Return a value of this type from a UInt type.
- def _headImpl(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Bits
- def _impl_##(that: Bits)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Bits
- def _impl_%(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_&(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_*(that: SInt)(implicit sourceInfo: SourceInfo): SInt
- Attributes
- protected
- def _impl_*(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_+(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_+%(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_+&(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_-(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_-%(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_-&(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_/(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_<(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _impl_<<(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- def _impl_<<(that: BigInt)(implicit sourceInfo: SourceInfo): UInt
- def _impl_<<(that: Int)(implicit sourceInfo: SourceInfo): UInt
- def _impl_<=(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _impl_=/=(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _impl_===(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _impl_>(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _impl_>=(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _impl_>>(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- def _impl_>>(that: BigInt)(implicit sourceInfo: SourceInfo): UInt
- def _impl_>>(that: Int)(implicit sourceInfo: SourceInfo): UInt
- def _impl_^(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_unary_!(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _impl_unary_-(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_unary_-%(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _impl_unary_~(implicit sourceInfo: SourceInfo): UInt
- def _impl_|(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _maxImpl(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Num
- def _minImpl(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Num
- def _orRImpl(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _padImpl(that: Int)(implicit sourceInfo: SourceInfo): UInt.this.type
- Attributes
- protected
- Definition Classes
- Bits
- def _padLit(that: Int): UInt.this.type
- def _rotateLeftImpl(n: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _rotateLeftImpl(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _rotateRightImpl(n: UInt)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _rotateRightImpl(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- def _tailImpl(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Bits
- def _takeImpl(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Attributes
- protected
- Definition Classes
- Bits
- def _xorRImpl(implicit sourceInfo: SourceInfo): Bool
- Attributes
- protected
- def _zextImpl(implicit sourceInfo: SourceInfo): SInt
- Attributes
- protected
- final macro def abs: UInt
Absolute value operator
- final macro def andR: Bool
And reduction operator
- final macro def apply(x: BigInt, y: BigInt): UInt
Returns a subset of bits on this UInt from
hitolo(inclusive), statically addressed.Returns a subset of bits on this UInt from
hitolo(inclusive), statically addressed.- x
the high bit
- y
the low bit
- returns
a hardware component containing the requested bits
- Definition Classes
- BitsIntf
val myBits = "0b101".U myBits(1, 0) // "0b01".U // extracts the two least significant bits // Note that zero-width ranges are also legal myBits(-1, 0) // 0.U(0.W) // zero-width UInt
Example: - final macro def apply(x: Int, y: Int): UInt
Returns a subset of bits on this UInt from
hitolo(inclusive), statically addressed.Returns a subset of bits on this UInt from
hitolo(inclusive), statically addressed.- x
the high bit
- y
the low bit
- returns
a hardware component containing the requested bits
- Definition Classes
- BitsIntf
val myBits = "0b101".U myBits(1, 0) // "0b01".U // extracts the two least significant bits // Note that zero-width ranges are also legal myBits(-1, 0) // 0.U(0.W) // zero-width UInt
Example: - final macro def apply(x: UInt): Bool
Returns the specified bit on this wire as a Bool, dynamically addressed.
Returns the specified bit on this wire as a Bool, dynamically addressed.
- x
a hardware component whose value will be used for dynamic addressing
- returns
the specified bit
- Definition Classes
- BitsIntf
- final macro def apply(x: Int): Bool
Returns the specified bit on this UInt as a Bool, statically addressed.
- final macro def apply(x: BigInt): Bool
Returns the specified bit on this UInt as a Bool, statically addressed.
- def as[S <: Data](implicit ev: <:<[UInt, S]): connectable.Connectable[S]
Static cast to a super type
Static cast to a super type
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- final macro def asBool: Bool
- final macro def asBools: Seq[Bool]
Returns the contents of this wire as a scala.collection.Seq of Bool.
Returns the contents of this wire as a scala.collection.Seq of Bool.
- Definition Classes
- BitsIntf
- final def asInstanceOf[T0]: T0
- Definition Classes
- Any
- final macro def asSInt: SInt
- macro def asTypeOf[T <: Data](that: T): T
Does a reinterpret cast of the bits in this node into the format that provides.
Does a reinterpret cast of the bits in this node into the format that provides. Returns a new Wire of that type. Does not modify existing nodes.
x.asTypeOf(that) performs the inverse operation of x := that.toBits.
- Definition Classes
- DataIntf
- Note
bit widths are NOT checked, may pad or drop bits from input
,that should have known widths
- final macro def asUInt: UInt
Reinterpret cast to UInt.
Reinterpret cast to UInt.
- Definition Classes
- DataIntf
- Note
value not guaranteed to be preserved: for example, a SInt of width 3 and value -1 (0b111) would become an UInt with value 7
,Aggregates are recursively packed with the first element appearing in the least-significant bits of the result.
- def autoSeed(name: String): UInt.this.type
Takes the last seed suggested.
Takes the last seed suggested. Multiple calls to this function will take the last given seed, unless this HasId is a module port (see overridden method in Data.scala).
If the final computed name conflicts with the final name of another signal, the final name may get uniquified by appending a digit at the end of the name.
Is a lower priority than suggestName, in that regardless of whether autoSeed was called, suggestName will always take precedence if it was called.
- returns
this object
- Definition Classes
- Data → HasId
- val base: UInt
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def binding: Option[Binding]
- def binding_=(target: Binding): Unit
- Attributes
- protected
- Definition Classes
- Data
- final macro def bitSet(off: UInt, dat: Bool): UInt
Conditionally set or clear a bit
- def clone(): AnyRef
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.CloneNotSupportedException]) @native()
- def cloneType: UInt.this.type
Internal API; Chisel users should look at chisel3.chiselTypeOf(...).
- def containsAFlipped: Boolean
- def do_##(that: Bits)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- BitsIntf
- def do_%(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_&(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_*(that: SInt)(implicit sourceInfo: SourceInfo): SInt
- Definition Classes
- UIntIntf
- def do_*(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_+(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_+%(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_+&(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_-(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_-%(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_-&(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_/(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_<(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_<<(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_<<(that: BigInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_<<(that: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_<=(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_=/=(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_===(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_>(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_>=(that: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_>>(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_>>(that: BigInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_>>(that: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_^(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_abs(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_andR(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- final def do_apply(x: BigInt, y: BigInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- BitsIntf
- final def do_apply(x: Int, y: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- BitsIntf
- final def do_apply(x: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- BitsIntf
- final def do_apply(x: Int)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- BitsIntf
- final def do_apply(x: BigInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- BitsIntf
- def do_asBool(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- BitsIntf → ToBoolable
- def do_asBools(implicit sourceInfo: SourceInfo): Seq[Bool]
- Definition Classes
- BitsIntf
- def do_asSInt(implicit sourceInfo: SourceInfo): SInt
- Definition Classes
- UIntIntf
- def do_asTypeOf[T <: Data](that: T)(implicit sourceInfo: SourceInfo): T
- Definition Classes
- DataIntf
- def do_asUInt(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- DataIntf
- def do_bitSet(off: UInt, dat: Bool)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- final def do_extract(x: UInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- BitsIntf
- final def do_extract(x: BigInt)(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- BitsIntf
- def do_head(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- BitsIntf
- def do_max(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- NumIntf
- def do_min(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- NumIntf
- def do_orR(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_pad(that: Int)(implicit sourceInfo: SourceInfo): UInt.this.type
- Definition Classes
- BitsIntf
- def do_rotateLeft(n: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_rotateLeft(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_rotateRight(n: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_rotateRight(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_tail(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- BitsIntf
- final def do_take(n: Int)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- BitsIntf
- def do_unary_!(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_unary_-(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_unary_~(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def do_xorR(implicit sourceInfo: SourceInfo): Bool
- Definition Classes
- UIntIntf
- def do_zext(implicit sourceInfo: SourceInfo): SInt
- Definition Classes
- UIntIntf
- def do_|(that: UInt)(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- def ensuring(cond: (UInt) => Boolean, msg: => Any): UInt
- def ensuring(cond: (UInt) => Boolean): UInt
- def ensuring(cond: Boolean, msg: => Any): UInt
- def ensuring(cond: Boolean): UInt
- final def eq(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def equals(that: Any): Boolean
- Definition Classes
- HasId → AnyRef → Any
- def exclude(members: (UInt) => Data*): connectable.Connectable[UInt]
Select members of base to exclude
Select members of base to exclude
- members
functions given the base return a member to exclude
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def exclude: connectable.Connectable[UInt]
Adds base to excludes
Adds base to excludes
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def excludeAs[S <: Data](members: (UInt) => Data*)(implicit ev: <:<[UInt, S]): connectable.Connectable[S]
Select members of base to exclude and static cast to a new type
Select members of base to exclude and static cast to a new type
- members
functions given the base return a member to exclude
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def excludeEach[S <: Data](pf: PartialFunction[Data, Seq[Data]])(implicit ev: <:<[UInt, S]): connectable.Connectable[S]
Programmatically select members of base to exclude and static cast to a new type
Programmatically select members of base to exclude and static cast to a new type
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def excludeProbes: connectable.Connectable[UInt]
Exclude probes
Exclude probes
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- final macro def extract(x: UInt): Bool
Returns the specified bit on this wire as a Bool, dynamically addressed.
Returns the specified bit on this wire as a Bool, dynamically addressed.
- x
a hardware component whose value will be used for dynamic addressing
- returns
the specified bit
- Definition Classes
- BitsIntf
- final macro def extract(x: BigInt): Bool
Returns the specified bit on this UInt as a Bool, statically addressed.
- def finalize(): Unit
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.Throwable])
- final def getClass(): Class[_ <: AnyRef]
- Definition Classes
- AnyRef → Any
- Annotations
- @native()
- final def getWidth: Int
Returns the width, in bits, if currently known.
Returns the width, in bits, if currently known.
- Definition Classes
- Data
- def hasSeed: Boolean
- returns
Whether either autoName or suggestName has been called
- Definition Classes
- HasId
- def hashCode(): Int
- Definition Classes
- HasId → AnyRef → Any
- final macro def head(n: Int): UInt
Head operator
Head operator
- n
the number of bits to take
- returns
The
nmost significant bits of this UInt
- Definition Classes
- BitsIntf
- def instanceName: String
- Definition Classes
- HasId → InstanceId
- final def isInstanceOf[T0]: Boolean
- Definition Classes
- Any
- def isLit: Boolean
- Definition Classes
- Data
- final def isWidthKnown: Boolean
Returns whether the width is currently known.
Returns whether the width is currently known.
- Definition Classes
- Data
- def litOption: Option[BigInt]
If this is a literal that is representable as bits, returns the value as a BigInt.
- def litValue: BigInt
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
- Definition Classes
- Data
- final macro def max(that: UInt): UInt
Maximum operator
- final macro def min(that: UInt): UInt
Minimum operator
- def name: String
- Definition Classes
- Element
- final def ne(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def notWaivedOrSqueezedOrExcluded: Boolean
True if no members are waived or squeezed or excluded
True if no members are waived or squeezed or excluded
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- final def notify(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native()
- final def notifyAll(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native()
- final macro def orR: Bool
Or reduction operator
- final macro def pad(that: Int): UInt.this.type
Pad operator
Pad operator
- that
the width to pad to
- returns
this @coll zero padded up to width
that. Ifthatis less than the width of the original component, this method returns the original component.
- Definition Classes
- BitsIntf
- Note
For SInts only, this will do sign extension.
- def parentModName: String
- Definition Classes
- HasId → InstanceId
- def parentPathName: String
- Definition Classes
- HasId → InstanceId
- def pathName: String
- Definition Classes
- HasId → InstanceId
- def readOnly(implicit sourceInfo: SourceInfo): UInt
Returns a read-only view of this Data
Returns a read-only view of this Data
It is illegal to connect to the return value of this method. This Data this method is called on must be a hardware type.
- Implicit
- This member is added by an implicit conversion from UInt toAsReadOnly[UInt] performed by method AsReadOnly in chisel3.Data.
- Definition Classes
- AsReadOnly
- final macro def rotateLeft(that: UInt): UInt
- Definition Classes
- UIntIntf
- final macro def rotateLeft(that: Int): UInt
Circular shift to the left
Circular shift to the left
- that
number of bits to rotate
- returns
UInt of same width rotated left n bits
- Definition Classes
- UIntIntf
- final macro def rotateRight(that: UInt): UInt
- Definition Classes
- UIntIntf
- final macro def rotateRight(that: Int): UInt
Circular shift to the right
Circular shift to the right
- that
number of bits to rotate
- returns
UInt of same width rotated right n bits
- Definition Classes
- UIntIntf
- def squeeze(members: (UInt) => Data*): connectable.Connectable[UInt]
Select members of base to squeeze
Select members of base to squeeze
- members
functions given the base return a member to squeeze
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def squeeze: connectable.Connectable[UInt]
Adds base to squeezes
Adds base to squeezes
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def squeezeAll: connectable.Connectable[UInt]
Squeeze all members of base
Squeeze all members of base
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def squeezeAllAs[S <: Data](implicit ev: <:<[UInt, S]): connectable.Connectable[S]
Squeeze all members of base and upcast to super type
Squeeze all members of base and upcast to super type
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def squeezeEach[S <: Data](pf: PartialFunction[Data, Seq[Data]]): connectable.Connectable[UInt]
Programmatically select members of base to squeeze
Programmatically select members of base to squeeze
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def suggestName(seed: => String): UInt.this.type
Takes the first seed suggested.
Takes the first seed suggested. Multiple calls to this function will be ignored. If the final computed name conflicts with another name, it may get uniquified by appending a digit at the end.
Is a higher priority than
autoSeed, in that regardless of whetherautoSeedwas called, suggestName will always take precedence.- seed
The seed for the name of this component
- returns
this object
- Definition Classes
- HasId
- final def synchronized[T0](arg0: => T0): T0
- Definition Classes
- AnyRef
- final macro def tail(n: Int): UInt
Tail operator
Tail operator
- n
the number of bits to remove
- returns
This UInt with the
nmost significant bits removed.
- Definition Classes
- BitsIntf
- final macro def take(n: Int): UInt
Grab the bottom n bits.
Grab the bottom n bits. Return 0.U(0.W) if n==0.
- Definition Classes
- BitsIntf
- final def toAbsoluteTarget: ReferenceTarget
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
- Definition Classes
- NamedComponent → InstanceId
- final def toNamed: ComponentName
Returns a FIRRTL ComponentName that references this object
Returns a FIRRTL ComponentName that references this object
- Definition Classes
- NamedComponent → InstanceId
- Note
Should not be called until circuit elaboration is complete
- final def toPrintable: Printable
Default print as Decimal
- final def toRelativeTarget(root: Option[BaseModule]): ReferenceTarget
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
If
rootis defined, the target is a hierarchical path starting fromroot.If
rootis not defined, the target is a hierarchical path equivalent totoAbsoluteTarget.- Definition Classes
- NamedComponent
- Note
If
,rootis defined, and has not finished elaboration, this must be called withinatModuleBodyEnd.The NamedComponent must be a descendant of
,root, if it is defined.This doesn't have special handling for Views.
- final def toRelativeTargetToHierarchy(root: Option[Hierarchy[BaseModule]]): ReferenceTarget
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
Returns a FIRRTL ReferenceTarget that references this object, relative to an optional root.
If
rootis defined, the target is a hierarchical path starting fromroot.If
rootis not defined, the target is a hierarchical path equivalent totoAbsoluteTarget.- Definition Classes
- NamedComponent
- Note
If
,rootis defined, and has not finished elaboration, this must be called withinatModuleBodyEnd.The NamedComponent must be a descendant of
,root, if it is defined.This doesn't have special handling for Views.
- def toString(): String
- Definition Classes
- UInt → AnyRef → Any
- final def toTarget: ReferenceTarget
Returns a FIRRTL ReferenceTarget that references this object
Returns a FIRRTL ReferenceTarget that references this object
- Definition Classes
- NamedComponent → InstanceId
- Note
Should not be called until circuit elaboration is complete
- def typeName: String
A non-ambiguous name of this
Bitsinstance for use in generated Verilog names Inserts the width directly after the typeName, e.g. - final macro def unary_!: Bool
Unary not
- final macro def unary_-: UInt
Unary negation (constant width)
- final macro def unary_~: Bits
Bitwise inversion operator
- def unsafe: connectable.Connectable[Data]
Connect to/from all fields regardless of Scala type, squeeze if necessary, and don't error if mismatched members
Connect to/from all fields regardless of Scala type, squeeze if necessary, and don't error if mismatched members
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- final def validateShiftAmount(x: Int)(implicit sourceInfo: SourceInfo): Int
- Attributes
- protected
- Definition Classes
- Bits
- final def wait(): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long, arg1: Int): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException]) @native()
- def waive(members: (UInt) => Data*): connectable.Connectable[UInt]
Select members of base to waive
Select members of base to waive
- members
functions given the base return a member to waive
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveAll: connectable.Connectable[UInt]
Waive all members of base
Waive all members of base
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveAllAs[S <: Data](implicit ev: <:<[UInt, S]): connectable.Connectable[S]
Waive all members of base and static cast to a new type
Waive all members of base and static cast to a new type
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveAs[S <: Data](members: (UInt) => Data*)(implicit ev: <:<[UInt, S]): connectable.Connectable[S]
Select members of base to waive and static cast to a new type
Select members of base to waive and static cast to a new type
- members
functions given the base return a member to waive
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveEach[S <: Data](pf: PartialFunction[Data, Seq[Data]])(implicit ev: <:<[UInt, S]): connectable.Connectable[S]
Programmatically select members of base to waive and static cast to a new type
Programmatically select members of base to waive and static cast to a new type
- Implicit
- This member is added by an implicit conversion from UInt toConnectable[UInt] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def widthKnown: Boolean
- Definition Classes
- Element
- final def widthOption: Option[Int]
Returns Some(width) if the width is known, else None.
Returns Some(width) if the width is known, else None.
- Definition Classes
- Data
- final macro def xorR: Bool
Exclusive or (xor) reduction operator
- final macro def zext: SInt
Zero extend as SInt
- final macro def |(that: UInt): UInt
Bitwise or operator
Shadowed Implicit Value Members
- def +(other: String): String
- Implicit
- This member is added by an implicit conversion from UInt toany2stringadd[UInt] performed by method any2stringadd in scala.Predef.
- Shadowing
- This implicitly inherited member is shadowed by one or more members in this class.
To access this member you can use a type ascription:(uInt: any2stringadd[UInt]).+(other)
- Definition Classes
- any2stringadd
- def ===(rhs: UInt): Bool
Dynamic recursive equality operator for generic Data
Dynamic recursive equality operator for generic Data
- Implicit
- This member is added by an implicit conversion from UInt toDataEquality[UInt] performed by method DataEquality in chisel3.Data.
- Shadowing
- This implicitly inherited member is shadowed by one or more members in this class.
To access this member you can use a type ascription:(uInt: DataEquality[UInt]).===(rhs)
- Definition Classes
- DataEquality
- Exceptions thrown
ChiselExceptionwhenlhsandrhsare different types during elaboration time
Deprecated Value Members
- def do_unary_-%(implicit sourceInfo: SourceInfo): UInt
- Definition Classes
- UIntIntf
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 6.8.0) Use unary_- which has the same behavior
- def formatted(fmtstr: String): String
- Implicit
- This member is added by an implicit conversion from UInt toStringFormat[UInt] performed by method StringFormat in scala.Predef.
- Definition Classes
- StringFormat
- Annotations
- @deprecated @inline()
- Deprecated
(Since version 2.12.16) Use
formatString.format(value)instead ofvalue.formatted(formatString), or use thef""string interpolator. In Java 15 and later,formattedresolves to the new method in String which has reversed parameters.
- final macro def unary_-%: UInt
Unary negation (constant width)
- def →[B](y: B): (UInt, B)
- Implicit
- This member is added by an implicit conversion from UInt toArrowAssoc[UInt] performed by method ArrowAssoc in scala.Predef.
- Definition Classes
- ArrowAssoc
- Annotations
- @deprecated
- Deprecated
(Since version 2.13.0) Use
->instead. If you still wish to display it as one character, consider using a font with programming ligatures such as Fira Code.
Inherited from NumIntf[UInt]
Inherited from UIntIntf
Inherited from Bits
Inherited from BitsIntf
Inherited from ToBoolable
Inherited from Element
Inherited from Data
Inherited from DataIntf
Inherited from SourceInfoDoc
Inherited from NamedComponent
Inherited from HasId
Inherited from InstanceId
Inherited from AnyRef
Inherited from Any
Inherited by implicit conversion AsReadOnly fromUInt to AsReadOnly[UInt]
Inherited by implicit conversion DataEquality fromUInt to DataEquality[UInt]
Inherited by implicit conversion toConnectableDefault fromUInt to Connectable[UInt]
Inherited by implicit conversion ConnectableDefault fromUInt to ConnectableDefault[UInt]
Arithmetic
Arithmetic hardware operators
Bitwise
Comparison
Comparison hardware operators
connection
Ungrouped
SourceInfoTransformMacro
These internal methods are not part of the public-facing API!
The equivalent public-facing methods do not have the do_ prefix or have the same name. Use and look at the
documentation for those. If you want left shift, use <<, not do_<<. If you want conversion to a
Seq of Bools look at the asBools above, not the one below. Users can safely ignore
every method in this group!
🐉🐉🐉 Here be dragons... 🐉🐉🐉
These do_X methods are used to enable both implicit passing of SourceInfo
while also supporting chained apply methods. In effect all "normal" methods that you, as a user, will use in your
designs, are converted to their "hidden", do_*, via macro transformations. Without using macros here, only one
of the above wanted behaviors is allowed (implicit passing and chained applies)---the compiler interprets a
chained apply as an explicit 'implicit' argument and will throw type errors.
The "normal", public-facing methods then take no SourceInfo. However, a macro transforms this public-facing method
into a call to an internal, hidden do_* that takes an explicit SourceInfo by inserting an
implicitly[SourceInfo] as the explicit argument.
This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt,SInt,Bool,Clock, andReg, the abstract typesBits,Aggregate, andData, and the aggregate typesBundleandVec.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
utilpackage.The
testerspackage defines the basic interface for chisel testers.