Packages

  • package root

    This is the documentation for Chisel.

    This is the documentation for Chisel.

    Package structure

    The chisel3 package presents the public API of Chisel. It contains the concrete core types UInt, SInt, Bool, Clock, and Reg, the abstract types Bits, Aggregate, and Data, and the aggregate types Bundle and Vec.

    The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.

    Utility objects and methods are found in the util package.

    The testers package defines the basic interface for chisel testers.

    Definition Classes
    root
  • package chisel3

    This package contains the main chisel3 API.

    This package contains the main chisel3 API.

    Definition Classes
    root
  • package util

    The util package provides extensions to core chisel for common hardware components and utility functions

    The util package provides extensions to core chisel for common hardware components and utility functions

    Definition Classes
    chisel3
  • package circt
    Definition Classes
    util
  • package dpi
    Definition Classes
    circt
  • ClockGate
  • IsX
  • Mux2Cell
  • Mux4Cell
  • PlusArgsRetBundle
  • PlusArgsTest
  • PlusArgsValue
  • SizeOf

object ClockGate

Source
ClockGate.scala
Linear Supertypes
AnyRef, Any
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. ClockGate
  2. AnyRef
  3. Any
  1. Hide All
  2. Show All
Visibility
  1. Public
  2. Protected

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##: Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def apply(input: Clock, enable: Bool): Clock

    Creates an intrinsic which enables and disables a clock safely, without glitches, based on a boolean enable value.

    Creates an intrinsic which enables and disables a clock safely, without glitches, based on a boolean enable value. If the enable input is 1, the output clock produced by the clock gate is identical to the input clock. If the enable input is 0, the output clock is a constant zero.

    Example:

    1. gateClock := ClockGate(clock, enable)
  5. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  6. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.CloneNotSupportedException]) @native()
  7. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  8. def equals(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef → Any
  9. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.Throwable])
  10. final def getClass(): Class[_ <: AnyRef]
    Definition Classes
    AnyRef → Any
    Annotations
    @native()
  11. def hashCode(): Int
    Definition Classes
    AnyRef → Any
    Annotations
    @native()
  12. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  13. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  14. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  15. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  16. final def synchronized[T0](arg0: => T0): T0
    Definition Classes
    AnyRef
  17. def toString(): String
    Definition Classes
    AnyRef → Any
  18. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  19. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  20. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException]) @native()

Inherited from AnyRef

Inherited from Any

Ungrouped