Chisel 3


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Chisel is a new hardware construction language to support advanced hardware design and circuit generation. The latest iteration of Chisel is Chisel3, which uses Firrtl as an intermediate hardware representation language.

Chisel3 releases are available as jars on Sonatype/Nexus/Maven and as tagged branches on the releases tab of this repository. The latest release is 3.1.3.

Please visit the Wiki for documentation!

The ScalaDoc for Chisel3 is available at the API tab on the Chisel web site.


The standard Chisel3 compilation pipeline looks like:

  • Chisel3 (Scala) to Firrtl (this is your “Chisel RTL”).
  • Firrtl to Verilog (which can then be passed into FPGA or ASIC tools).
  • Verilog to C++ for simulation and testing using Verilator.


This will walk you through installing Chisel and its dependencies:

  • sbt, which is the preferred Scala build system and what Chisel uses.
  • Firrtl, which compiles Chisel’s IR down to Verilog. If you’re building from a release branch of Chisel3, separate installation of Firrtl is no longer required: the required jar will be automatically downloaded by sbt. If you’re building chisel3 from the master branch, you’ll need to follow the directions on the Firrtl repository to publish a local copy of the required jar.
  • Verilator, which compiles Verilog down to C++ for simulation. The included unit testing infrastructure uses this.

(Ubuntu-like) Linux

  1. Install Java
    sudo apt-get install default-jdk
  2. Install sbt, which isn’t available by default in the system package manager:
     echo "deb /" | sudo tee -a /etc/apt/sources.list.d/sbt.list
     sudo apt-key adv --keyserver hkp:// --recv 642AC823
     sudo apt-get update
     sudo apt-get install sbt
  3. Install Verilator. We currently recommend Verilator version 3.922. Follow these instructions to compile it from source.

    1. Install prerequisites (if not installed already):
       sudo apt-get install git make autoconf g++ flex bison
    2. Clone the Verilator repository:
       git clone
    3. In the Verilator repository directory, check out a known good version:
       git pull
       git checkout verilator_3_922
    4. In the Verilator repository directory, build and install:
       unset VERILATOR_ROOT # For bash, unsetenv for csh
       autoconf # Create ./configure script
       sudo make install

Arch Linux

yaourt -S firrtl-git verilator sbt


TODO: write me. If you really want to see this happen, let us know by filing a bug report!

Mac OS X

brew install sbt verilator

Getting Started

If you are migrating to Chisel3 from Chisel2, please visit Chisel3 vs Chisel2

Data Types Overview

These are the base data types for defining circuit wires (abstract types which may not be instantiated are greyed out):


Chisel Tutorial

For Hardware Engineers

This section describes how to get started using Chisel to create a new RTL design from scratch.

Project Setup


TODO: toy example


The simulation unit testing infrastructure is still a work in progress.

See src/test/scala/chiselTests for example unit tests. Assert.scala is a pretty bare-bones unittest which also somewhat verifies the testing system itself.

Unit tests are written with the ScalaTest unit testing framework, optionally with ScalaCheck generators to sweep the parameter space where desired.

BasicTester-based tests run a single circuit in simulation until either the test finishes or times out after a set amount of cycles. After compilation, there is no communication between the testdriver and simulation (unlike Chisel2’s Tester, which allowed dynamic peeks and pokes), so all testvectors must be determined at compile time.

The circuits run must subclass BasicTester, which is a Module with the addition of a stop function which finishes the testbench and reports success. Any asserts that trigger (in either the BasicTester or a submodule) will cause the test to fail. printfs will forward to the console.

To write a test using the BasicTester that integrates with sbt test, create a class that extends either ChiselFlatSpec (BDD-style testing) or ChiselPropSpec (ScalaCheck generators). In the test content, use

assert(execute{ new MyTestModule })

where MyTestModule is your top-level test circuit that extends BasicTester.

A more Chisel2-like tester may come in the future.

Compiling to Simulation

TODO: commands to compile project to simulation

TODO: running testbenches

For Chisel Developers

This section describes how to get started developing Chisel itself, including how to test your version locally against other projects that pull in Chisel using sbt’s managed dependencies.

Compiling and Testing Chisel

In the Chisel repository directory, run:

sbt compile

to compile the Chisel library. If the compilation succeeded, you can then run the included unit tests by invoking:

sbt test

Running Projects Against Local Chisel

To use the development version of Chisel (master branch), you will need to build from source and publishLocal. The repo version can be found in the build.sbt file. As of the time of writing it was:

version := "3.2-SNAPSHOT",

To publish your version of Chisel to the local Ivy (sbt’s dependency manager) repository, run:

sbt publishLocal

PROTIP: sbt can automatically run commands on a source change if you prefix the command with ~. For example, the above command to publish Chisel locally becomes sbt ~publishLocal.

sbt’s manual recommends that you use a SNAPSHOT version suffix to ensure that the local repository is checked for updates. Since the current default is a SNAPSHOT, and the version number is already incremented compared to the currently published snapshot, you dont need to change version.

The compiled version gets placed in ~/.ivy2/local/. You can nuke the relevant subfolder to un-publish your local copy of Chisel.

In order to have your projects use this version of Chisel, you should update the libraryDependencies setting in your project’s build.sbt file to:

libraryDependencies += "edu.berkeley.cs" %% "chisel3" % "3.2-SNAPSHOT"

The version specifier in libraryDependencies in the project’s build.sbt should match the version string in your local copy of Chisel’s build.sbt.

Technical Documentation

Chisel3 Architecture Overview

The Chisel3 compiler consists of these main parts:

  • The frontend, chisel3.*, which is the publicly visible “API” of Chisel and what is used in Chisel RTL. These just add data to the…
  • The Builder, chisel3.internal.Builder, which maintains global state (like the currently open Module) and contains commands, generating…
  • The intermediate data structures, chisel3.firrtl.*, which are syntactically very similar to Firrtl. Once the entire circuit has been elaborated, the top-level object (a Circuit) is then passed to…
  • The Firrtl emitter, chisel3.firrtl.Emitter, which turns the intermediate data structures into a string that can be written out into a Firrtl file for further processing.

Also included is:

  • The standard library of circuit generators, chisel3.util.*. These contain commonly used interfaces and constructors (like Decoupled, which wraps a signal with a ready-valid pair) as well as fully parameterizable circuit generators (like arbiters and muxes).
  • Driver utilities, chisel3.Driver, which contains compilation and test functions that are invoked in the standard Verilog generation and simulation testing infrastructure. These can also be used as part of custom flows.


Chisel is powered by Scala and brings all the power of object-oriented and functional programming to type-safe hardware design and generation.


Chisel, the Chisel standard library, and Chisel testing infrastructure enable agile, expressive, and reusable hardware design methodologies.


The FIRRTL circuit compiler starts after Chisel and enables backend (FPGA, ASIC, technology) specialization, automated circuit transformation, and Verilog generation.