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# LFSR16 

#### object LFSR16

LFSR16 generates a 16-bit linear feedback shift register, returning the register contents. This is useful for generating a pseudo-random sequence.

The example below, taken from the unit tests, creates two 4-sided dice using `LFSR16` primitives:

Annotations
@deprecated
Deprecated

(Since version 3.2) LFSR16 is deprecated in favor of the parameterized chisel3.util.random.LFSR

Source
LFSR.scala
Example:
1. ```val bins = Reg(Vec(8, UInt(32.W)))

// Create two 4 sided dice and roll them each cycle.
// Use tap points on each LFSR so values are more independent
val die0 = Cat(Seq.tabulate(2) { i => LFSR16()(i) })
val die1 = Cat(Seq.tabulate(2) { i => LFSR16()(i + 2) })

val rollValue = die0 +& die1  // Note +& is critical because sum will need an extra bit.

bins(rollValue) := bins(rollValue) + 1.U```
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### Deprecated Value Members

1. def apply(increment: Bool = true.B): UInt

Generates a 16-bit linear feedback shift register, returning the register contents.

Generates a 16-bit linear feedback shift register, returning the register contents.

increment

optional control to gate when the LFSR updates.

Annotations
@deprecated @chiselName()
Deprecated

(Since version 3.2) Use chisel3.util.random.LFSR(16) for a 16-bit LFSR