Class/Object

chisel3.core

Mem

Related Docs: object Mem | package core

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sealed class Mem[T <: Data] extends MemBase[T]

A combinational/asynchronous-read, sequential/synchronous-write memory.

Writes take effect on the rising clock edge after the request. Reads are combinational (requests will return data on the same cycle). Read-after-write hazards are not an issue.

Note

when multiple conflicting writes are performed on a Mem element, the result is undefined (unlike Vec, where the last assignment wins)

Linear Supertypes
MemBase[T], NamedComponent, HasId, internal.InstanceId, AnyRef, Any
Ordering
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Inherited
  1. Mem
  2. MemBase
  3. NamedComponent
  4. HasId
  5. InstanceId
  6. AnyRef
  7. Any
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Visibility
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Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  4. macro def apply(x: UInt): T

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    Creates a read/write accessor into the memory with dynamic addressing.

    Creates a read/write accessor into the memory with dynamic addressing. See the class documentation of the memory for more detailed information.

    Definition Classes
    MemBase
  5. macro def apply(x: Int): T

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    Creates a read accessor into the memory with static addressing.

    Creates a read accessor into the memory with static addressing. See the class documentation of the memory for more detailed information.

    Definition Classes
    MemBase
  6. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any
  7. def circuitName: String

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    Attributes
    protected
    Definition Classes
    HasId
  8. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  9. def do_apply(idx: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T

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    Definition Classes
    MemBase
  10. def do_apply(idx: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T

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    Definition Classes
    MemBase
  11. def do_read(idx: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T

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    Definition Classes
    MemBase
  12. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  13. def equals(that: Any): Boolean

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    Definition Classes
    HasId → AnyRef → Any
  14. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  15. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any
  16. def hashCode(): Int

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    Definition Classes
    HasId → AnyRef → Any
  17. def instanceName: String

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    Definition Classes
    HasId → InstanceId
  18. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any
  19. val length: Int

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    Definition Classes
    MemBase
  20. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  21. final def notify(): Unit

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    Definition Classes
    AnyRef
  22. final def notifyAll(): Unit

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    Definition Classes
    AnyRef
  23. def parentModName: String

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    Definition Classes
    HasId → InstanceId
  24. def parentPathName: String

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    Definition Classes
    HasId → InstanceId
  25. def pathName: String

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    Definition Classes
    HasId → InstanceId
  26. macro def read(x: UInt): T

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    Creates a read accessor into the memory with dynamic addressing.

    Creates a read accessor into the memory with dynamic addressing. See the class documentation of the memory for more detailed information.

    Definition Classes
    MemBase
  27. def suggestName(name: ⇒ String): Mem.this.type

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    Definition Classes
    HasId
  28. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef
  29. final def toNamed: ComponentName

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    Returns a FIRRTL ComponentName that references this object

    Returns a FIRRTL ComponentName that references this object

    Definition Classes
    NamedComponent → InstanceId
    Note

    Should not be called until circuit elaboration is complete

  30. def toString(): String

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    Definition Classes
    AnyRef → Any
  31. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  32. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  33. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  34. def write(idx: UInt, data: T, mask: Seq[Bool])(implicit evidence: <:<[T, Vec[_]], compileOptions: CompileOptions): Unit

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    Creates a masked write accessor into the memory.

    Creates a masked write accessor into the memory.

    idx

    memory element index to write into

    data

    new data to write

    mask

    write mask as a Seq of Bool: a write to the Vec element in memory is only performed if the corresponding mask index is true.

    Definition Classes
    MemBase
    Note

    this is only allowed if the memory's element data type is a Vec

  35. def write(idx: UInt, data: T)(implicit compileOptions: CompileOptions): Unit

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    Creates a write accessor into the memory.

    Creates a write accessor into the memory.

    idx

    memory element index to write into

    data

    new data to write

    Definition Classes
    MemBase

Inherited from MemBase[T]

Inherited from NamedComponent

Inherited from HasId

Inherited from internal.InstanceId

Inherited from AnyRef

Inherited from Any

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