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object LegalizeClocksAndAsyncResetsTransform

Source
LegalizeClocksAndAsyncResets.scala
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  1. final def !=(arg0: Any): Boolean
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  15. def onMod(mod: DefModule): DefModule
  16. def onStmt(namespace: ⇒ Namespace)(stmt: Statement): Statement

    Legalize Clocks and AsyncResets in a Statement

    Legalize Clocks and AsyncResets in a Statement

    Enforces legal Verilog semantics on all Clock and AsyncReset Expressions. Legal is defined as what standard lint tools accept. Currently only Literal Expressions (guarded by casts) are handled.

    Note

    namespace is lazy because it should not typically be needed

  17. final def synchronized[T0](arg0: ⇒ T0): T0
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