UIntLiteral
ir
UIntType
ir
UNKNOWNGENDER
firrtl
UndeclaredReferenceException
CheckChirrtl CheckHighForm
UninferredWidth
CheckWidths
Uniquify
passes
UnknownForm
firrtl
UnknownType
ir
UnknownWidth
ir
UseInfo
Parser
Utils
firrtl
ug
VerilogMemDelays
uint
Utils
unapply
FirrtlExecutionSuccess Annotation GroundType IntWidth
unescape
StringLit
unique
NodeCount
uniqueFrom
NodeCount
update
Annotation LegacyAnnotation NoTargetAnnotation SingleTargetAnnotation CombinationalPath GroupAnnotation
updateMemMods
RenameAnnotatedMemoryPorts ReplaceMemMacros
updateMemStmts
RenameAnnotatedMemoryPorts ReplaceMemMacros ResolveMemoryReference
updateStmtRefs
MemTransformUtils
updateStmts
ResolveMaskGranularity ToMemIR
ut
CheckTypes RemoveCHIRRTL
util
firrtl