Object

firrtl.passes.memlib

VerilogMemDelays

Related Doc: package memlib

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object VerilogMemDelays extends Transform with Pass

This pass generates delay reigsters for memories for verilog

Linear Supertypes
Pass, Transform, LazyLogging, AnyRef, Any
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Inherited
  1. VerilogMemDelays
  2. Pass
  3. Transform
  4. LazyLogging
  5. AnyRef
  6. Any
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Visibility
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Type Members

  1. type Netlist = HashMap[String, Expression]

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Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  4. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any
  5. def buildNetlist(netlist: Netlist)(s: Statement): Statement

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  6. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  7. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  8. def equals(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  9. def execute(state: CircuitState): CircuitState

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    Perform the transform, encode renaming with RenameMap, and can delete annotations Called by runTransform.

    Perform the transform, encode renaming with RenameMap, and can delete annotations Called by runTransform.

    state

    Input Firrtl AST

    returns

    A transformed Firrtl AST

    Definition Classes
    PassTransform
  10. implicit def expToString(e: Expression): String

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  11. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  12. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any
  13. final def getMyAnnotations(state: CircuitState): Seq[Annotation]

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    Convenience method to get annotations relevant to this Transform

    Convenience method to get annotations relevant to this Transform

    state

    The CircuitState form which to extract annotations

    returns

    A collection of annotations

    Definition Classes
    Transform
  14. def hashCode(): Int

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    Definition Classes
    AnyRef → Any
  15. def inputForm: CircuitForm

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    The firrtl.CircuitForm that this transform requires to operate on

    The firrtl.CircuitForm that this transform requires to operate on

    Definition Classes
    PassTransform
  16. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any
  17. val logger: Logger

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    Definition Classes
    LazyLogging
  18. def memDelayMod(m: DefModule): DefModule

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  19. def memDelayStmt(netlist: Netlist, namespace: Namespace, repl: Netlist)(s: Statement): Statement

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  20. def name: String

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    A convenience function useful for debugging and error messages

    A convenience function useful for debugging and error messages

    Definition Classes
    Transform
  21. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  22. final def notify(): Unit

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    Definition Classes
    AnyRef
  23. final def notifyAll(): Unit

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    Definition Classes
    AnyRef
  24. def outputForm: CircuitForm

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    The firrtl.CircuitForm that this transform outputs

    The firrtl.CircuitForm that this transform outputs

    Definition Classes
    PassTransform
  25. def replaceExp(repl: Netlist)(e: Expression): Expression

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  26. def replaceStmt(repl: Netlist)(s: Statement): Statement

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  27. def run(c: Circuit): Circuit

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    Definition Classes
    VerilogMemDelaysPass
  28. final def runTransform(state: CircuitState): CircuitState

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    Perform the transform and update annotations.

    Perform the transform and update annotations.

    state

    Input Firrtl AST

    returns

    A transformed Firrtl AST

    Definition Classes
    Transform
  29. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef
  30. def toString(): String

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    Definition Classes
    AnyRef → Any
  31. val ug: UNKNOWNGENDER.type

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  32. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  33. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  34. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from Pass

Inherited from Transform

Inherited from LazyLogging

Inherited from AnyRef

Inherited from Any

Ungrouped