macro class chiselName extends internal.naming.chiselName
Experimental macro for naming Chisel hardware values
By default, Chisel uses reflection for naming which only works for public fields of Bundle
and Module
classes. Applying this macro annotation to a class
or object
enables Chisel
to name any hardware values within the annotated class
or object.
- Annotations
- @compileTimeOnly( ... )
- Source
- package.scala
import chisel3._ import chisel3.experimental.chiselName @chiselName class MyModule extends Module { val io = IO(new Bundle { val in = Input(UInt(8.W)) val out = Output(UInt(8.W)) }) def createReg(): Unit = { // @chiselName allows Chisel to name this Reg val myReg = RegInit(io.in) io.out := myReg } createReg() }
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This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt
,SInt
,Bool
,FixedPoint
,Clock
, andReg
, the abstract typesBits
,Aggregate
, andData
, and the aggregate typesBundle
andVec
.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
util
package.The
testers
package defines the basic interface for chisel testers.